LE13 Testing for RK3288, RK3328, RK3399, RK3566, RK3568, RK3576, RK3588

    Hi chewitt, two RK3399 boot issues I found and fixed on real boards while working on Lakka (which shares the LE Rockchip bootloader setup):
    1. NanoPi M4 2GB The 2GB variant uses DDR3 (Samsung K4B4G1646E-BCMA) instead of the LPDDR3 on the 4GB model, so the nanopi-m4 image stops in TPL with "sdram_init: LPDDR3 - 933MHz failed!". Adding a nanopi-m4-2gb entry using the upstream nanopi-m4-2gb-rk3399_defconfig fixes it. Tested on LE master (U-Boot 2026.07). PR: https://github.com/LibreELEC/LibreELEC.tv/pull/11832
    2. ROCK 4C+ (V1.41 with different LPDDR4) Same issue as https://forum.libreelec.tv/thread/29774/ : with the mainline TPL there is no UART output at all (confirmed with the current LE master rock-4c-plus image). It boots with the legacy chain (rkbin DDR blob + miniloader + trust, mainline U-Boot proper) using rk3399_ddr_666MHz_v1.30.bin, matching Radxa's statement that the RK3399-T needs the RAM at 666MHz. I added it as a separate "rock-4c-plus-ddr666" board so existing rock-4c-plus users are unaffected. The DDR blob is selected in rkbin/package.mk, next to the RK3328 frequency override. Tested on LE master: boots to Kodi on cold boot and reboot, 4GB RAM. Commit: https://github.com/ShigeakiAsai/L…65eb17339d1cc5e Is this approach acceptable for a PR, or would you prefer something else (e.g. mainline SPL with CONFIG_ROCKCHIP_EXTERNAL_TPL)?

    Quote from adamosborne83

    Will the nightlies work on Ugoos SK3 powered SoC RK3588S2-DV and 8/128 GB on board?

    I don't think so. I've not seen any mention of RK3588S2 support in the upstream kernel (only RK3588/RK3588S). The SoC differences are likely minor, but as there is no u-boot defconfig or board dts in the kernel for that box, LE will want to see those pieces in-place before offering support. NB: AFAIK there is no 8K support for RK3588 at the moment (in the to-do list, but not at the top) and DV will likely require some proper reverse engineering. I wouldn't rush out to buy one just yet.

    Quote from chewitt

    I don't think so. I've not seen any mention of RK3588S2 support in the upstream kernel (only RK3588/RK3588S). The SoC differences are likely minor, but as there is no u-boot defconfig or board dts in the kernel for that box, LE will want to see those pieces in-place before offering support. NB: AFAIK there is no 8K support for RK3588 at the moment (in the to-do list, but not at the top) and DV will likely require some proper reverse engineering. I wouldn't rush out to buy one just yet.

    Thank You so much for the reply, I will keep my eye on things as I always do.


    Cheers again C

    I uploaded booting and stoping UART TTL logs from Radxa rock 5b+ at testing build and also at LE13 nightly build. With kernel 7 is rarity of succes shut down, but was also recorded with logs.

    Post

    RE: LE13 on Radxa ROCK 5B+

    UART TLL logs from LE 13 Nigthly build (is going from NVME) and Last testing build (going from SD card)
    atirage21
    October 8, 2026 at 8:11 PM

    So far, I have not been able to boot correctly new builds from chewitt github on internal eMMC
    I use Khadas Edge2 RK3588s, the SPI flash erase but stuck here:

    If i use u-boot-rockchip.bin from https://github.com/khadas/u-boot/tree/khadas-u-boot-v2024.07 and
    dd if=u-boot-rockchip.bin of=LibreELEC.khadas-edge2.img seek=64 conv=notrunc,fsync
    Boot process is correct an Libreeelc is working

    Is there any other way to use the current U-Boot version?

    Dmesg log from last testing build 21.10.2026 of Radxa rock 5b plus:

    https://paste.libreelec.tv/compensational-memphis.log

    Turn off is correctly as at kernel 6.19, and compare to older kernel is working a power button as first time ever at LE. Always is issue with wakeup through lan/button.

    It seems systems working better than with kernel 6.19. Thank you and i am waiting for a beatiful update to LE13 :)

    Edited 7 times, last by atirage21 (October 25, 2026 at 10:51 AM).

    f1gogata please retest with the latest image in my test share. If there is still the same issue with 2026.10 u-boot please pastebin the full UART boot output (don't snip anything). I've swapped to upstream AT-F from rkbin to enable HDMI-RX support so this might (or might not) change anything.

    This is new log:

    Try instal first armbian and only after libreelec. I was succes with this guide. According ai gemini is two separate spl topic, one for androide booting and second for linux booting. Armbian can update spl to linux bootong which is relevant for libreelec.

    Edge2 — Armbian
    Download Armbian for Edge2 by Khadas. Platinum support, 11 images available including Resolute, Trixie, Sid.
    armbian.com

    Edited once, last by atirage21 (October 25, 2026 at 1:00 PM).

    this is log with U-Boot 2024.07 dd to - LibreELEC-RK3588.aarch64-12.95.1-khadas-edge2.img

    Quote from atirage21

    Armbian can update spl to linux bootong which is relevant for libreelec.

    SPL = Secondary Program Loader (BL33) = u-boot

    LE compiles and ships its own u-boot. There is no requirement to boot/use Armbian for anything first, and if you are using other distro boot firmware your LE install receives no support because we have no idea what was patched into their u-boot source. The only requirement is that you erase any u-boot in SPI flash (because this will always take precedence over u-boot on SD/eMMC).

    Quote from f1gogata

    this is log with U-Boot 2024.07 dd to - LibreELEC-RK3588.aarch64-12.95.1-khadas-edge2.img

    How does a 2024.07 log help me understand the issue with 2026.10?

    NB: If you are using images from my test share updating with LibreELEC-RK3588.aarch64-12.95.1-khadas-edge2.img (not the .tar file) will update the u-boot version installed on the boot device. Current images use 2026.10 with upstream AT-F not rkbin.

    The full log of UART with - LibreELEC-RK3588.aarch64-12.95.1-khadas-edge2.img
    Is this one:

    Quote from f1gogata

    This is new log:

    f1gogata It looks like the edge2 u-boot defconfig set options designed for Android and this is the cause. I've defined an override in the Rockchip u-boot config that should fix that and the image in my test share is updated. Please download and retest.

    Quote from chewitt

    f1gogata It looks like the edge2 u-boot defconfig set options designed for Android and this is the cause. I've defined an override in the Rockchip u-boot config that should fix that and the image in my test share is updated. Please download and retest.

    Now the boot is OK. But there is no video, and USB are not recognized. Log file https://paste.libreelec.tv/snaggy-buffy.log

    And boot UART:
    DDR ff1a08bde6 typ 25/03/13-15:39:39,fwver: v1.19
    ch0 ttot10
    ch1 ttot10
    ch2 ttot10
    ch3 ttot10
    ch0 ttot16
    LPDDR4X, 2112MHz
    channel[0] BW=16 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=8 Size=4096MB
    ch1 ttot16
    channel[1] BW=16 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=8 Size=4096MB
    ch2 ttot16
    channel[2] BW=16 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=8 Size=4096MB
    ch3 ttot16
    channel[3] BW=16 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=8 Size=4096MB
    Manufacturer ID:0x6
    DQS rds:l0,h1
    CH0 RX Vref:29.7%, TX Vref:23.8%,22.8%
    DQ rds:h5 h1 h3 h1 h1 l0 h2 l0, h2 h4 h2 h1 h2 h1 h1 h3

    DQS rds:h3,l0
    CH1 RX Vref:28.5%, TX Vref:21.8%,21.8%
    DQ rds:h4 h3 h1 h3 h2 l0 l0 h1, l0 h1 l2 h3 h2 h2 h3 l0

    DQS rds:l0,l5
    CH2 RX Vref:25.8%, TX Vref:22.8%,22.8%
    DQ rds:l0 l0 h1 l1 h3 h1 h1 h1, l0 h1 h2 l0 l0 l0 l1 h6

    DQS rds:h4,l0
    CH3 RX Vref:30.1%, TX Vref:22.8%,21.8%
    DQ rds:h2 h2 h5 h4 h3 h3 h5 h3, l0 h1 h1 l0 l0 h1 l0 h5

    stride=0x2, ddr_config=0x4
    hash ch_mask0-1 0x20 0x40, bank_mask0-3 0xa00 0x1400 0x2800 0x0, rank_mask0 0x401000
    change to F1: 528MHz
    ch0 ttot10
    ch1 ttot10
    ch2 ttot10
    ch3 ttot10
    change to F2: 1068MHz
    ch0 ttot12
    ch1 ttot12
    ch2 ttot12
    ch3 ttot12
    change to F3: 1560MHz
    ch0 ttot14
    ch1 ttot14
    ch2 ttot14
    ch3 ttot14
    change to F0: 2112MHz
    ch0 ttot16
    ch1 ttot16
    ch2 ttot16
    ch3 ttot16
    out

    U-Boot SPL 2026.10 (Oct 26 2026 - 12:06:58 +0000)
    Trying to boot from MMC1
    ## Checking hash(es) for config config-1 ... OK
    ## Checking hash(es) for Image atf-1 ... sha256+ OK
    ## Checking hash(es) for Image u-boot ... sha256+ OK
    ## Checking hash(es) for Image fdt-1 ... sha256+ OK
    ## Checking hash(es) for Image atf-2 ... sha256+ OK
    ## Checking hash(es) for Image atf-3 ... sha256+ OK
    NOTICE: BL31: v2.15.0(release):12.0.0-10135-gbe2fe77ac4-dirty
    NOTICE: BL31: Built : 17:04:29, Oct 20 2026


    U-Boot 2026.10 (Oct 26 2026 - 12:06:58 +0000)

    Model: Khadas Edge2
    SoC: RK3588S
    DRAM: 16 GiB
    DDR ff1a08bde6 typ 25/03/13-15:39:39,fwver: v1.19
    ch0 ttot10
    ch1 ttot10
    ch2 ttot10
    ch3 ttot10
    ch0 ttot16
    LPDDR4X, 2112MHz
    channel[0] BW=16 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=8 Size=4096MB
    ch1 ttot16
    channel[1] BW=16 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=8 Size=4096MB
    ch2 ttot16
    channel[2] BW=16 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=8 Size=4096MB
    ch3 ttot16
    channel[3] BW=16 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=8 Size=4096MB
    Manufacturer ID:0x6
    DQS rds:l0,h1
    CH0 RX Vref:29.3%, TX Vref:23.8%,23.8%
    DQ rds:h4 l0 h2 l0 h1 l0 h1 l1, h1 h3 h2 h1 h1 h1 h1 h3

    DQS rds:h3,l0
    CH1 RX Vref:28.5%, TX Vref:21.8%,21.8%
    DQ rds:h4 h3 h1 h2 h1 h1 l0 h1, l0 h1 l2 h4 h2 h2 h2 l0

    DQS rds:l0,l5
    CH2 RX Vref:25.8%, TX Vref:22.8%,23.8%
    DQ rds:l0 l0 h2 l1 h4 h1 h2 h1, l0 h1 h2 l0 l0 l0 l1 h6

    DQS rds:h4,l0
    CH3 RX Vref:30.1%, TX Vref:22.8%,20.8%
    DQ rds:h2 h2 h5 h3 h3 h2 h5 h3, l0 h1 h1 l0 l0 h1 l0 h5

    stride=0x2, ddr_config=0x4
    hash ch_mask0-1 0x20 0x40, bank_mask0-3 0xa00 0x1400 0x2800 0x0, rank_mask0 0x401000
    change to F1: 528MHz
    ch0 ttot10
    ch1 ttot10
    ch2 ttot10
    ch3 ttot10
    change to F2: 1068MHz
    ch0 ttot12
    ch1 ttot12
    ch2 ttot12
    ch3 ttot12
    change to F3: 1560MHz
    ch0 ttot14
    ch1 ttot14
    ch2 ttot14
    ch3 ttot14
    change to F0: 2112MHz
    ch0 ttot16
    ch1 ttot16
    ch2 ttot16
    ch3 ttot16
    out

    U-Boot SPL 2026.10 (Oct 26 2026 - 12:06:58 +0000)
    Trying to boot from MMC1
    ## Checking hash(es) for config config-1 ... OK
    ## Checking hash(es) for Image atf-1 ... sha256+ OK
    ## Checking hash(es) for Image u-boot ... sha256+ OK
    ## Checking hash(es) for Image fdt-1 ... sha256+ OK
    ## Checking hash(es) for Image atf-2 ... sha256+ OK
    ## Checking hash(es) for Image atf-3 ... sha256+ OK
    NOTICE: BL31: v2.15.0(release):12.0.0-10135-gbe2fe77ac4-dirty
    NOTICE: BL31: Built : 17:04:29, Oct 20 2026


    U-Boot 2026.10 (Oct 26 2026 - 12:06:58 +0000)

    Model: Khadas Edge2
    SoC: RK3588S
    DRAM: 16 GiB
    Core: 728 devices, 30 uclasses, devicetree: separate
    MMC: mmc@fe2c0000: 1, mmc@fe2e0000: 0
    Loading Environment from nowhere... OK
    In: serial@feb50000
    Out: serial@feb50000
    Err: serial@feb50000
    Model: Khadas Edge2
    SoC: RK3588S
    Net: No ethernet found.
    Hit SPACE in 1 seconds to stop autoboot
    Scanning for bootflows in all bootdevs
    Seq Method State Uclass Part Name Filename
    --- ----------- ------ -------- ---- ------------------------ ----------------
    Scanning bootdev '[email protected]':
    Card did not respond to voltage select! : -110
    Card did not respond to voltage select! : -110
    Card did not respond to voltage select! : -110
    Scanning bootdev '[email protected]':
    0 extlinux ready mmc 1 [email protected] /extlinux/extlinux.conf
    ** Booting bootflow '[email protected]_1' with extlinux
    1: LibreELEC
    Retrieving file: /KERNEL
    append: boot=UUID=2610-0537 disk=UUID=a9d0585d-9d88-414e-bafe-6200973e78c5 quiet earlycon console=uart8250,mmio32,0xfeb50000 console=tty0 coherent_pool=2M systemd.debug_shell=ttyS2
    Retrieving file: /rockchip/rk3588s-khadas-edge2.dtb
    ## Flattened Device Tree blob at 12000000
    Booting using the fdt blob at 0x12000000
    Working FDT set to 12000000
    Loading Device Tree to 00000000eceaa000, end 00000000eced67ba ... OK
    Working FDT set to eceaa000

    Starting kernel ...

    [ 0.326630] sdhci-dwcmshc fe2e0000.mmc: Can't reduce the clock below 52MHz in HS200/HS400 mode
    [ 0.539269] rockchip-pm-domain fd8d8000.power-management:power-controller: Failed to create device link (0x180) with supplier spi2.0 for /power-management@fd8d8000/power-controller/power-domain@12
    +q6E616D65LibreELEC:/ #