ok it worked
and its powering on and off from the remote in le 8.2.2.3 kszaq build
can i get a link to your latest ddr3 uboot @ 792
just incase the one in S912_H96_3G_DDR34_171120_MAC_ubootfix
is an old build with problems
I'm not concerned with the composition of Android systems. Later I will provide the link with update.
Ok on looking into this further
The CZ-S32-v2.2 / v3 DDR3/DDD4 Uboot
Runs DDR3 @ 816MHz & Runs DDR4 @ 792MHZ
Can we get a Uboot with these stock frequency's to match
the factory Uboot
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0+1 @ 816MHz -
DDR3 chl: Rank0 @ 816MHz -
DDR3 chl: Rank0 16bit @ 816MHz -
DDR4 chl: Rank0+1 @ 792MHz -
otherwise we will be getting a small performance downgrade
from 816 to 792 on ddr3 devices with your uboot
So far only theoretically. I need a full log with RAM initialization and a beta tester.
i can test it at 816 if you make it..
& Runs DDR4 @ 792MHZ -
nop, "PASS" is missing behind
hi bumerc
is there a fix for this hdmi-cec jam issue..
exactly the same issue as described here.
thanks
Working on my CZ-S32-v2.2 DDR3 Board
Whats the DDR4 Clocks on this uboot just out of interest
hi bumerc
is there a fix for this hdmi-cec jam issue..
exactly the same issue as described here.
thanks
Yes.
Either disable HDMI CEC drivers in the GUI and have this task done by the u-boot, or vice versa. Both at the same time is a bad solution. The solution with u-boot does not fit with all concepts. For the systems like CE I would simply deactivate the HDMI CEC function in the u-boot
Working on my CZ-S32-v2.2 DDR3 Board
Whats the DDR4 Clocks on this uboot just out of interest
This u-boot was compiled with RAM auto-detection. This can be used for devices with DDR3 and also DDR4, if the DDR timing and clk rate allow this.
Aparently The Stock Wisdom 20171120 uboot already has the ir code so works without having to flash
a custom uboot according to someone on freaktab
(will confirm this myself at some point by pulling the uboot and combinging it with aml_7.1.2_s912_q9377-S912_mac-20180409)
I also suspect the Beelink Mini M8s Pro uboot would work fine for
CZ-S32-V2 & CZ-S32-V3 users the remote looks almost the same as the H96 Remote
and Beelink do program the ir code on the gt1 ultimate atleast but that comes with a diff remote than h96
(will confirm this myself at some point by pulling the uboot and combinging it with aml_7.1.2_s912_q9377-S912_mac-20180409)
You forgot to mention that it just does not work for you
. What is the length of your network cable? Does the router have 1Gbit connection, or only 100Mbit? If you have CE installed, try this dtb
What can change the DTB file, if Android also crashes? Cable lenght is maybe 1 or 2 meter, gigabit connection is no problem (AVM 7490)
I see, that i have Longsys LTM8830 WLAN chip instead of Atheros 9377, but dont think, it causes the crashes. I use cable connection.
What can change the DTB file, if Android also crashes? Cable lenght is maybe 1 or 2 meter, gigabit connection is no problem (AVM 7490)
...
q200 and q201 dtb are different. Decompile these and just look.
-
From the uboot side it can only guess .. that this error could be caused by the switching between rmii and rgmii interface. Otherwise, I have no ideas ..
Small update
- forced rgmii mode
not tested, please try it.
Thanks, will try later and give you response. 
Just get this:
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:80;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 90010
BL2 Built : 13:27:37, Oct 25 2017. gxl g56b77aa - xiaobo.gu@droid12
set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 1
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
LPDDR3 chl: Rank0+1 @ 792MHz
bist_test rank: 0 17 0b 23 33 1b 4b 10 00 21 3f 26 58 1b 0b 2c 31 19 49 18 04 2d 32 17 4d 717 rank: 1 17 0a 24 33 1c 4b 10 00 20 3d 27 54 1a 0a 2b 31 1a 49 18 04 2d 2f 15 4a 717
Rank0: 2048MB(auto)-2T-3
Rank1: 1024MB(auto)-2T-3
AddrBus test pass!
-s
emmc switch 3 ok
BL2: rpmb counter: 0x000000ac
emmc switch 0 ok
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from eMMC, src: 0x00050200, des: 0x01000000, size: 0x00066c00
NOTICE: BL3-1: v1.0(release):7c45a4f
NOTICE: BL3-1: Built : 14:09:28, Oct 13 2017
NOTICE: BL31: GXL normal boot!
NOTICE: BL31: BL33 decompress pass
mpu_config_enable:ok
[Image: gxl_v1.1.3255-1a77b01 2017-09-15 16:58:02 xiaobo.gu@droid12]
OPS=0x82
wdt: reset registers!
68 ed de 3e 1c 0 71 de c5 d5 8c 71 [1.150944 Inits done]
secure task start!
=== PROCESS EXCEPTION: 04 ====== xPSR: 01000000 ===
r0 :00000001 r1 :1000b4bc r2 :1000b088 r3 :1000b068
r4 :1000d400 r5 :00000000 r6 :00000000 r7 :00000000
r8 :00000000 r9 :00000000 r10:00000000 r11:00000000
r12:00000000 sp :1000d350 lr :1000a039 pc :1000a68a
Data access violation, mfar = 1000b084
mmfs = 82, shcsr = 70001, hfsr = 0, dfsr = 0
=========== Process Stack Contents ===========
1000d370: 00000000 00000000 00000000 10000ac9
1000d380: 00000000 00000000 00000000 00000000
1000d390: 00000000 00000000 00000000 00000000
1000d3a0: 00000000 00000000 00000000 00000000Ok, I'm still doing a build, then it should work again. Currently I do not have a H96pp device for testing anymore
are this new versions and are they for my H96p+ CZ-S32-v5 ?
