Posts by ukmark62

Quote from jernej

ukmark62 That seems fine.

Are following lines continuously being repeated or they stop after some time?

[  OK  ] Started Kodi Media Center.

[  OK  ] Stopped Kodi Media Center.

If not, are you sure you correctly identified TX pin?

One thing you can try at this point is to recreate SD card. Burn image again, overwrite U-Boot and fix DT before first boot. It's possible that something was stored at first boot which doesn't match anymore, like board name.

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Those lines repeat indefinitely after about every 5 seconds. I swapped the TX pin and now I can enter "dmesg", enter and I get a response. However, when I type "dmesg" it shows up as "ddmmeessgg". So it looks like TX pin was in wrong place on H6 board. New log:-

Quote from jernej

Also remove quiet from extlinux/extlinux.conf. You should get more or less same output as with dmesg on serial console.

One thing I notice when booting and connected to TV is that display resolution is 1024x768 at 60hz

Quote from jernej

you just type it in on serial, unless SoC is halted.

Please test this:

tanix-tx6.zip

When I type dmesg, nothing happens.

Quote from jernej

ukmark62 Edit extlinux/extlinux.conf again and remove console=tty1 from append line. That way you will get terminal on serial console. Please copy and paste output of dmesg.

BTW, please use pastebin for it or at least use spoiler tag.

UART Log here:-

Couldn't execute dmesg. Where do I do that?

Quote from jernej

ukmark62 Can you please test attached sun50i-h6-tanix-tx6.dtb? Copy it in same folder where orangepi3 one is and edit extlinux/extlinux.conf and change DT file name.

For reference, there is also non-compiled version included.

attachment: tanix-tx6-dt.zip

The box booted and LE was installed. Then on reboot immediately after install, box hangs at LE splash screen.

Attached to UART boot log is:-

U-Boot SPL 2018.11-g7702a7c-dirty (Jun 15 2019 - 11:18:38 +0100)

DRAM: 4096 MiB

Trying to boot from MMC1

NOTICE: BL31: v2.1(release):v2.1-264-g5441ed2

NOTICE: BL31: Built : 11:03:02, Jun 10 2019

NOTICE: BL31: Detected Allwinner H6 SoC (1728)

NOTICE: BL31: Found U-Boot DTB at 0xc06ddc0, model: Eachlink H6 Mini

NOTICE: PMIC: Probing AXP805

ERROR: Start clear bit timeout

ERROR: PMIC: Cannot put AXP805 to master mode.

U-Boot 2018.11-g7702a7c-dirty (Jun 15 2019 - 11:18:38 +0100) Allwinner Technology

CPU: Allwinner H6 (SUN50I)

Model: Eachlink H6 Mini

DRAM: 3 GiB

MMC: SUNXI SD/MMC: 0, SUNXI SD/MMC: 1

Loading Environment from FAT... Unable to use mmc 1:1... In: serial@5000000

Out: serial@5000000

Err: serial@5000000

Net: No ethernet found.

starting USB...

No controllers found

Hit any key to stop autoboot: 0

switch to partitions #0, OK

mmc0 is current device

Scanning mmc 0:1...

Found /extlinux/extlinux.conf

Retrieving file: /extlinux/extlinux.conf

179 bytes read in 3 ms (57.6 KiB/s)

1: LibreELEC

Retrieving file: /KERNEL

16626176 bytes read in 1665 ms (9.5 MiB/s)

append: boot=UUID=1206-0000 disk=UUID=52d85c1f-cdb2-41f5-b0ff-e4ccfc776d39 quiet console=ttyS0,115200 console=tty1

Retrieving file: /sun50i-h6-tanix-tx6.dtb

15285 bytes read in 4 ms (3.6 MiB/s)

## Flattened Device Tree blob at 4fa00000

Booting using the fdt blob at 0x4fa00000

Loading Device Tree to 0000000049ff9000, end 0000000049fffbb4 ... OK

Starting kernel ...

[ 0.256596] sun50i-de2-bus 1000000.display-engine: Error couldn't map SRAM to device

[ 0.257344] sun4i-usb-phy 5100400.phy: failed to get clock usb0_phy

[ 0.380800] sun4i-i2s 5091000.i2s: Max playback channels changed from 2 to 8

Quote from jernej

In general, yes. How you write image to SD card is up to you. I use "dd" for everything, but that is not the best method.

In this case you'll use orangepi3 DT, which of course is not optimal, but it should show some signs of life. Later, we should write Tanix TX6 specific DT.

The box did not boot, so I attached UART and booted. This is the UART log. Sd card had the usual 2 partitions (LIBREELEC and STORAGE):-

U-Boot SPL 2018.11-g7702a7c-dirty (Jun 15 2019 - 11:18:38 +0100)

DRAM: 4096 MiB

Trying to boot from MMC1

NOTICE: BL31: v2.1(release):v2.1-264-g5441ed2

NOTICE: BL31: Built : 11:03:02, Jun 10 2019

NOTICE: BL31: Detected Allwinner H6 SoC (1728)

NOTICE: BL31: Found U-Boot DTB at 0xc06ddc0, model: Eachlink H6 Mini

NOTICE: PMIC: Probing AXP805

ERROR: Start clear bit timeout

ERROR: PMIC: Cannot put AXP805 to master mode.

U-Boot 2018.11-g7702a7c-dirty (Jun 15 2019 - 11:18:38 +0100) Allwinner Technology

CPU: Allwinner H6 (SUN50I)

Model: Eachlink H6 Mini

DRAM: 3 GiB

MMC: SUNXI SD/MMC: 0, SUNXI SD/MMC: 1

Loading Environment from FAT... Unable to use mmc 1:1... In: serial@5000000

Out: serial@5000000

Err: serial@5000000

Net: No ethernet found.

starting USB...

No controllers found

Hit any key to stop autoboot: 0

switch to partitions #0, OK

mmc0 is current device

Scanning mmc 0:1...

Found /extlinux/extlinux.conf

Retrieving file: /extlinux/extlinux.conf

180 bytes read in 3 ms (58.6 KiB/s)

1: LibreELEC

Retrieving file: /KERNEL

16626176 bytes read in 1665 ms (9.5 MiB/s)

append: boot=UUID=1206-0000 disk=UUID=52d85c1f-cdb2-41f5-b0ff-e4ccfc776d39 quiet console=ttyS0,115200 console=tty1

Retrieving file: /sun50i-h6-orangepi-3.dtb

18827 bytes read in 4 ms (4.5 MiB/s)

# Flattened Device Tree blob at 4fa00000

Booting using the fdt blob at 0x4fa00000

Loading Device Tree to 0000000049ff8000, end 0000000049fff98a ... OK

Starting kernel ...

[ 0.258293] sun50i-de2-bus 1000000.display-engine: Error couldn't map SRAM to device

[ 0.258879] sun4i-usb-phy 5100400.phy: Couldn't request ID GPIO

[ 0.259109] sun50i-usb3-phy 5210000.phy: failed to get phy clock

[ 2.403812] i2c i2c-0: mv64xxx: I2C bus locked, block: 1, time_left: 0

[ 4.451810] i2c i2c-0: mv64xxx: I2C bus locked, block: 1, time_left: 0

[ 4.451831] axp20x-i2c 0-0036: Failed to set masks in 0x40: -110

[ 4.451846] axp20x-i2c 0-0036: failed to add irq chip: -110

[ 4.460256] sun4i-i2s 5091000.i2s: Max playback channels changed from 2 to 8

[ 4.472558] sun4i-usb-phy 5100400.phy: Couldn't request ID GPIO

[ 4.598579] sun8i-dw-hdmi 6000000.hdmi: Couldn't get ddc regulator

[ 4.604847] sun4i-drm display-engine: failed to bind 6000000.hdmi (ops sun8i_dw_hdmi_ops): -517

[ 4.613721] sun4i-drm display-engine: Couldn't bind all pipelines components

[ 4.861415] sun50i-h6-pinctrl 300b000.pinctrl: Couldn't get bank PD regulator

[ 4.868587] sun50i-h6-pinctrl 300b000.pinctrl: request() failed for pin 102

[ 4.875560] sun50i-h6-pinctrl 300b000.pinctrl: pin-102 (300b000.pinctrl:102) status -517

[ 4.884193] sun50i-h6-pinctrl 300b000.pinctrl: Couldn't get bank PC regulator

[ 4.891343] sun50i-h6-pinctrl 300b000.pinctrl: request() failed for pin 79

[ 4.898228] sun50i-h6-pinctrl 300b000.pinctrl: pin-79 (300b000.pinctrl:79) status -517

[ 4.906156] sun4i-usb-phy 5100400.phy: Couldn't request ID GPIO

[ 4.921126] sun50i-h6-pinctrl 300b000.pinctrl: Couldn't get bank PD regulator

[ 4.928313] sun50i-h6-pinctrl 300b000.pinctrl: request() failed for pin 102

[ 4.935308] sun50i-h6-pinctrl 300b000.pinctrl: pin-102 (300b000.pinctrl:102) status -517

[ 4.944040] sun50i-h6-pinctrl 300b000.pinctrl: Couldn't get bank PC regulator

[ 4.951201] sun50i-h6-pinctrl 300b000.pinctrl: request() failed for pin 79

[ 4.958103] sun50i-h6-pinctrl 300b000.pinctrl: pin-79 (300b000.pinctrl:79) status -517

[ 4.966042] sun4i-usb-phy 5100400.phy: Couldn't request ID GPIO

[ 4.974380] sun50i-h6-pinctrl 300b000.pinctrl: Couldn't get bank PD regulator

[ 4.981545] sun50i-h6-pinctrl 300b000.pinctrl: request() failed for pin 102

[ 4.988520] sun50i-h6-pinctrl 300b000.pinctrl: pin-102 (300b000.pinctrl:102) status -517

[ 4.997155] sun50i-h6-pinctrl 300b000.pinctrl: Couldn't get bank PC regulator

[ 5.004307] sun50i-h6-pinctrl 300b000.pinctrl: request() failed for pin 79

[ 5.011193] sun50i-h6-pinctrl 300b000.pinctrl: pin-79 (300b000.pinctrl:79) status -517

[ 5.019121] sun4i-usb-phy 5100400.phy: Couldn't request ID GPIO

Quote from jernej

ukmark62 Great! That means DDR3 initialization works! Still some work to do to put everything into appropriate form to be sent to U-Boot mailing list, but first Tanix TX6 LE image could be available next week.

BTW, you may experiment now by taking existing OrangePi 3 LE image and flash this U-Boot binary over. It won't work 100% correctly and there will be errors reported, but it may work

jernej

Write the Orange Pi 3 image to sd card (using rufus), then "dd" only the u-boot-sunxi-with-spl.bin to same sd card? Which dtb should I use or is that irrelevant? Thx

Quote from jernej

ukmark62 There's another patch: http://sprunge.us/c37uzy This time I updated DDR3 timings according to libdram, which might not be 100% correct...

We have changes............

U-Boot SPL 2018.11-g7702a7c-dirty (Jun 15 2019 - 11:18:38 +0100)

DRAM: 4096 MiB

Trying to boot from MMC1

NOTICE: BL31: v2.1(release):v2.1-264-g5441ed2

NOTICE: BL31: Built : 11:03:02, Jun 10 2019

NOTICE: BL31: Detected Allwinner H6 SoC (1728)

NOTICE: BL31: Found U-Boot DTB at 0xc06ddc0, model: Eachlink H6 Mini

NOTICE: PMIC: Probing AXP805

ERROR: Start clear bit timeout

ERROR: PMIC: Cannot put AXP805 to master mode.

U-Boot 2018.11-g7702a7c-dirty (Jun 15 2019 - 11:18:38 +0100) Allwinner Technology

CPU: Allwinner H6 (SUN50I)

Model: Eachlink H6 Mini

DRAM: 3 GiB

MMC: SUNXI SD/MMC: 0, SUNXI SD/MMC: 1

Loading Environment from FAT... Unable to use mmc 1:1... In: serial@5000000

Out: serial@5000000

Err: serial@5000000

Net: No ethernet found.

starting USB...

No controllers found

Hit any key to stop autoboot: 0

switch to partitions #0, OK

mmc0 is current device

Scanning mmc 0:1...

switch to partitions #0, OK

mmc1(part 0) is current device

** Unrecognized filesystem type **

starting USB...

No controllers found

USB is stopped. Please issue 'usb start' first.

starting USB...

No controllers found

No ethernet found.

missing environment variable: pxeuuid

missing environment variable: bootfile

Retrieving file: http://pxelinux.cfg/00000000

No ethernet found.

missing environment variable: bootfile

Retrieving file: http://pxelinux.cfg/0000000

No ethernet found.

missing environment variable: bootfile

Retrieving file: http://pxelinux.cfg/000000

No ethernet found.

missing environment variable: bootfile

Retrieving file: http://pxelinux.cfg/00000

No ethernet found.

missing environment variable: bootfile

Retrieving file: http://pxelinux.cfg/0000

No ethernet found.

missing environment variable: bootfile

Retrieving file: http://pxelinux.cfg/000

No ethernet found.

missing environment variable: bootfile

Retrieving file: http://pxelinux.cfg/00

No ethernet found.

missing environment variable: bootfile

Retrieving file: pxelinux.cfg/0

No ethernet found.

missing environment variable: bootfile

Retrieving file: http://pxelinux.cfg/default-arm-sunxi

No ethernet found.

missing environment variable: bootfile

Retrieving file: http://pxelinux.cfg/default-arm

No ethernet found.

missing environment variable: bootfile

Retrieving file: http://pxelinux.cfg/default

No ethernet found.

Config file not found

starting USB...

No controllers found

No ethernet found.

No ethernet found.

=>

Quote from jernej

ukmark62 I found few differences. Can you please test http://sprunge.us/pcxdsq ? I promise I'll wait for my own box for next test.

Still same I'm afraid:-

U-Boot SPL 2018.11-g7702a7c-dirty (Jun 12 2019 - 22:54:17 +0100)

DRAM:

Just to be sure - I am reverting the previously applied patch before applying the new one. Is that correct?

Quote from jernej

Yes, that's fine.

Now I'm thinking of buying one of those DDR3 boxes just for sake of working with DRAM driver (and later LE support).

I have a spare one. Are you based in the UK?

I have no problem helping out with later LE support. However, this DRAM stuff is way over my head

Quote from jernej

balbes150 are you trying to fix DRAM driver? ukmark62 using libdram is unacceptable for LE (legal issues)

jernej I referred balbes150 to post #31 in this thread. AFAIK that branch does not use libdram. Also, the u-boot files I sent him were compiled from that branch. Is that not correct?

If the branch I'm using is only a few commits back from libdram branch, would it be possible to compare the two branches and apply those changes to our branch - or is that a no go?

Quote from jernej

DRAM size should be printed and execution should continue.

balbes150 is trying to get it working on his TX6.

Quote from jernej

ukmark62 Can you please test this patch? http://sprunge.us/f0

As before - the log is below. Only the spl file is being dd'ed to sd card:-

U-Boot SPL 2018.11-g7702a7c-dirty (Jun 11 2019 - 17:07:42 +0100)

DRAM:

What do you hope to see?

Quote from balbes150

Judging by the UART log , u-boot is looking for a system to run. You can try to slip him a working system and see how it works. Can you share the u-boot file ? I'll try to build a test system to test the launch.

Zip file attached with 3 files - u-boot.bin, bl31.bin and u-boot-sunxi-with-spl.bin h6_uboot.zip

Post #31 (link here:- Tanix TX6) on this thread details how the compile environment was set up. Only took a couple of minutes to download the repository and checkout.

Let me know if you need anything else.

Quote from jernej

ukmark62 Can you try this patch if it helps? http://sprunge.us/7jcinx

I applied the patches with git (all successfully applied) and did the make on the config file and the make itself. Copied the new u-boot-sunxi-with-spl.bin to the SD card and the UART log shows just this:-

U-Boot SPL 2018.11-g7702a7c-dirty (Jun 10 2019 - 21:29:56 +0100)

DRAM:

Quote from balbes150

Right ?

https://yadi.sk/i/v5y9mhithgt13w

On my board, furthest right pin is TX and the pin next to that (4th pin from left or 2nd pin from right as lumpi said) is GND.

(I originally had the TX pin as 2nd pin from left, but all I got was garbage in UART.)

Quote from balbes150

Can you share a photo where UART is connected on TX6 ? I have this model, I want to check out the work of the new u-boot.

Sure.

Link here:-MEGA

On first picture (DSC00020,jpg), look at the 5 horizontal small holes at the bottom right inside a white rectangle box. I had to de-solder these 5 holes. Then used 5 header pins to connect to UART. From left to right - they are RX, next 2 are not used,GND,TX.

I'm trying to help jernej with adding this box to LibreELEC, but I'm afraid I have very little idea on what to do. All 3 lights are lit on the UART device (1 red and 2 blue). I can get UART logs and can compile u-boot (all with jernej help), but changing the u-boot source code to fix it for DDR3 is beyond me.

Would be great if you could help.

Quote from jernej

H6 only supports 3 GiB of memory, so if you have it 4 GiB on board, you should see 3 GiB reported in U-Boot.

There are two possible reasons why you see 2 GiB reported:

1. libdram supports only power of two sizes

2. Eachlink board has only 2 GiB of RAM and there is a hack for that.

In any way, when DDR3 support will be fixed, you should see 3 GiB reported.

What would be the next step for me to do? Thx.