Posts by illusi0n

illusi0n · @balbes150 LE images with Kodi-19 for S9xxx illusi0n May 7, 2020 at 11:12 AM

Hello. I am using the IMG from this topic to start X96Max with a corrupted nand flash. When downloading from an sd card via UART, I see the following:

Display Spoiler

G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:F;RCY:0;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;0.0;

bl2_stage_init 0x01

bl2_stage_init 0x81

hw id: 0x0001 - pwm id 0x00

bl2_stage_init 0xc0

bl2_stage_init 0x02

no sdio debug board detected

L0:00000000

L1:00000703

L2:00008067

L3:04000000

B2:00002000

B1:e0f83180

TE: 147954

BL2 Built : 10:47:19, Jan 14 2019. g12b g152d217 - guotai.shen@droid11-sz

Board ID = 1

Set A53 clk to 24M

Set A73 clk to 24M

Set clk81 to 24M

SYS1 pll lock check retry

try t0...

SYS1 pll lock check retry

try t1...

SYS1 pll lock check retry

Stop here...

I think MBR is correctly located by the loader, but for some reason I don't like it. Maybe there is some different version of u-boot.bin.sd.bin to boot AML S902X2?

p.s. I speak Russian

illusi0n · @balbes150 LE images with Kodi-19 for S9xxx illusi0n May 3, 2020 at 3:26 PM

chewitt , thank you for your attention.

I thought the problem was in the LibreELEC loading stages.

When downloading without an SD Card

Code

G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:F;RCY:0;EMMC:0;READ:800;READ:800;READ:800;SD?:20000;USB:8;LOOP:1;EMMC:0;READ:800;READ:800;READ:800;SD?:20000;USB:8;LOOP:2;EMMC:0;READ:800;READ:800;READ:800;SD?:20000;USB:8;LOOP:3;EMMC:0;READ:800;READ:800;READ:800;SD?:20000;USB:8;LOOP:4;EMMC:0;READ:800;READ:800;READ:800;SD?:20000;USB:8;LOOP:5;EMMC:0;READ:800;READ:800;READ:800;SD?:20000;USB:8;LOOP:6;EMMC:0;READ:800;READ:800;READ:800;SD?:20000;USB:8;LOOP:7;EMMC:0;READ:800;READ:800;READ:800;SD?:20000;USB:8;

When loading from the original recovery image there is information about LPDDR4 parameters

Code

Board ID = 1
Set A53 clk to 24M
Set A73 clk to 24M
Set clk81 to 24M
SYS1 pll lock check retry
try t0...
SYS1 pll lock check retry
try t1...
SYS1 pll lock check retry
Stop here...
G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:F;RCY:0;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;0.0;
                                                                                                             bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02

no sdio debug board detected
L0:00000000
L1:00000703
L2:00008067
L3:04000000
B2:00002000
B1:e0f83180

TE: 149436

BL2 Built : 10:47:19, Jan 14 2019. g12b g152d217 - guotai.shen@droid11-sz

Board ID = 1
Set A53 clk to 24M
Set A73 clk to 24M
Set clk81 to 24M
SYS1 pll lock check retry
try t0...
SYS1 pll lock check retry
try t1...
SYS1 pll lock check retry
Stop here...
G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:F;RCY:0;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:1;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:2;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:3;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:4;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:5;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:6;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:7;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:8;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:9;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:A;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:B;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:C;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:D;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:E;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:F;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:10;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:11;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:12;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:13;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:14;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:15;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:16;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:17;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:18;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:19;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:1A;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:1B;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:1C;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:1D;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:1E;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:1F;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:20;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:21;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:22;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:23;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:24;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:25;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:26;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:27;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:28;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:29;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:2A;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:2B;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:2C;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:2D;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:2E;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:2F;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:30;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:31;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:32;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:33;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:34;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:35;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:36;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:37;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:38;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:39;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:3A;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:3B;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:3C;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:3D;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:3E;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:3F;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:40;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:41;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:42;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:43;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:44;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:45;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:46;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:47;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:48;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:49;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:4A;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:4B;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:4C;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:4D;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:4E;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:4F;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:50;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:F;RCY:0;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:1;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;
LOOP:2;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;LOOP:3;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;CHK:1F;USB:8;G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:F;RCY:0;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:800;USB:8;LOOP:1;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:800;USB:8;LOOP:2;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:800;USB:8;LOOP:3;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:800;USB:8;
G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:F;RCY:0;EMMC:0;READ:800;READ:800;READ:800;SD?:20000;USB:8;LOOP:1;EMMC:0;READ:800;READ:800;READ:800;SD?:20000;USB:8;LOOP:2;EMMC:0;READ:800;READ:800;READ:800;SD?:20000;USB:8;LOOP:3;EMMC:0;READ:800;READ:800;READ:800;SD?:20000;USB:8;LOOP:4;EMMC:0;READ:800;READ:800;READ:800;SD?:20000;USB:8;LOOP:5;EMMC:0;READ:800;READ:800;READ:800;SD?:20000;USB:8;LOOP:6;EMMC:0;READ:800;READ:800;READ:800;SD?:20000;USB:8;LOOP:7;EMMC:0;READ:800;READ:800;READ:800;SD?:20000;USB:8;
G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:F;RCY:0;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;0.0

                                                                                                            bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0000 - pwm id 0xff
bl2_stage_init 0xff
bl2_stage_init 0x02

no sdio debug board detected
L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180

TE: 265736

BL2 Built : 15:17:12, Feb 20 2019. g12a gb91a9c0 - jenkins@walle02-sh

Board ID = 1
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
DDR driver_vesion: LPDDR4_PHY_V_0_1_11 build time: Feb 20 2019 15:17:08
board id: 1
Load FIP HDR from SD, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
fw parse done
Load ddrfw from SD, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0
Load ddrfw from SD, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0
PIEI prepare done
Cfg max: 5, cur: 1. Board id: 255. Force loop cfg
DDR4 probe
ddr clk to 912MHz
Load ddrfw from SD, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : End of initialization
INFO : STREAM 0x0069000 - 0x0000000
INFO : STREAM 0x0402000 -
INFO : ERROR : T_raining has failed!
1D t_raining failed
Cfg max: 5, cur: 2. Board id: 255. Force loop cfg
DDR3 probe
ddr clk to 792MHz
Load ddrfw from SD, src: 0x0002c200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : End of initialization
INFO : STREAM 0x0067000 -
INFO : STREAM 0x0402000 -
INFO : ERROR : T_raining has failed!
1D t_raining failed
Cfg max: 5, cur: 3. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 912MHz
Load ddrfw from SD, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : STREAM 0x00b0000 - 0x0000100
INFO : STREAM 0x00a7000 - 0x0000001
INFO : STREAM 0x0054000 - 0x0000000 0x0000000 0x0000000
INFO : STREAM 0x0056000 - 0x0000000 0x0000000 0x0000100 0x0000000 0x0000000 0x0000072
INFO : STREAM 0x005b000 - 0x0000000 0x0000003 0x0000009 0x0000003 0x0000000
INFO : End of CA t_raining
INFO : End of initialization
INFO : T_raining has run successfully!
Check phy result
INFO : STREAM 0x00b0000 - 0x0000100
INFO : STREAM 0x00a7000 - 0x0000001
INFO : STREAM 0x0054000 - 0x0000000 0x0000000 0x0000000
INFO : STREAM 0x0056000 - 0x0000000 0x0000000 0x0000031 0x0000000 0x0000000 0x0000072
INFO : STREAM 0x005b000 - 0x0000000 0x0000003 0x0000009 0x0000003 0x0000000
INFO : End of initialization
INFO : End of read enable t_raining
INFO : End of fine write leveling
INFO : End of read dq deskew t_raining
INFO : End of MPR read delay center optimization
INFO : End of Write leveling coarse delay
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency t_raining
INFO : T_raining has run successfully!
Check phy result
INFO : STREAM 0x00b0000 - 0x0000100
INFO : STREAM 0x00a7000 - 0x0000001
INFO : STREAM 0x0054000 - 0x0000000 0x0000000 0x0000000
INFO : STREAM 0x0056000 - 0x0000000 0x0000000 0x0000001 0x0000000 0x0000000 0x0000072
INFO : STREAM 0x005b000 - 0x0000000 0x0000003 0x0000009 0x0000003 0x0000000
INFO : End of initialization
INFO : End of write delay center optimization
INFO : T_raining has run successfully!
1D t_raining succeed
Load ddrfw from SD, src: 0x00048200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : STREAM 0x012c000 -
INFO : STREAM 0x0130000 - 0x0000100
INFO : STREAM 0x0127000 - 0x0000001
INFO : STREAM 0x00d4000 - 0x0000000 0x0000000 0x0000000
INFO : STREAM 0x00d6000 - 0x0000000 0x0000000 0x0000006 0x0000000 0x0000000 0x0000072
INFO : STREAM 0x00db000 - 0x0000000 0x0000003 0x0000001 0x0000003 0x0000000
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : T_raining has run successfully!

channel==0
RxClkDly_Margin_A0==171 ps 10
TxDqDly_Margin_A0==171 ps 10
RxClkDly_Margin_A1==171 ps 10
TxDqDly_Margin_A1==171 ps 10
TrainedVREFDQ_A0==74
TrainedVREFDQ_A1==74
VrefDac_Margin_A0==25
DeviceVref_Margin_A0==40
VrefDac_Margin_A1==25
DeviceVref_Margin_A1==40


channel==1
RxClkDly_Margin_A0==171 ps 10
TxDqDly_Margin_A0==171 ps 10
RxClkDly_Margin_A1==171 ps 10
TxDqDly_Margin_A1==171 ps 10
TrainedVREFDQ_A0==74
TrainedVREFDQ_A1==74
VrefDac_Margin_A0==26
DeviceVref_Margin_A0==40
VrefDac_Margin_A1==27
DeviceVref_Margin_A1==40

 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):000
2D t_raining succeed
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 2048MB
DMC_DDR_CTRL: 00e00024DDR size: 3928MB
cs0 DataBus test pass
cs1 DataBus test pass
cs0 AddrBus test pass
cs1 AddrBus test pass
 pre test  bdlr_100_average==453 bdlr_100_min==453 bdlr_100_max==453 bdlr_100_cur==453
 aft test  bdlr_100_average==453 bdlr_100_min==453 bdlr_100_max==453 bdlr_100_cur==453
100bdlr_step_size ps== 453
result report
boot times 0
non-sec scramble use zero key
ddr scramble enabled
Enable ddr reg access
Load FIP HDR from SD, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0
Load BL3X from SD, src: 0x00078200, des: 0x01768000, size: 0x000c0000, part: 0
0.0;M3 CHK:0;cm4_sp_mode 0
E30HDR
[Image: g12a_v1.1.3327-3761055 2018-07-31 18:47:10 jenkins@walle02-sh]
OPS=0x40
ring efuse init
28 0b 40 00 01 2d 1a 00 00 01 35 35 4b 48 4b 50
[0.014271 Inits done]
secure task start!
high task start!
low task start!
run into bl31
NOTICE:  BL31: v1.3(release):40e3f59
NOTICE:  BL31: Built : 16:26:05, Jul 18 2018
NOTICE:  BL31: G12A normal boot!
NOTICE:  BL31: BL33 decompress pass
ERROR:   Error initializing runtime service opteed_fast


U-Boot 2015.01 (Jun 25 2019 - 17:30:47)

DRAM:  3.8 GiB
Relocation Offset is: d6e69000
spi_post_bind(spifc): req_seq = 0
register usb cfg[0][1] = 00000000d7f46ff0
NAND:  get_sys_clk_rate_mtd() 266, clock setting 200!
NAND device id: 0 ff ff ff ff ff
No NAND device found!!!
nand init failed: -6
get_sys_clk_rate_mtd() 266, clock setting 200!
NAND device id: 0 ff ff ff ff ff
No NAND device found!!!
nand init failed: -6
MMC:   aml_priv->desc_buf = 0x00000000d3e59710
aml_priv->desc_buf = 0x00000000d3e5ba30
SDIO Port B: 0, SDIO Port C: 1
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
emmc/sd response timeout, cmd8, status=0x1ff2800
emmc/sd response timeout, cmd55, status=0x1ff2800
co-phase 0x3, tx-dly 0, clock 400000

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Maybe it makes sense to extract the U-Boot from the original image?

Please specify the link to the repository, because I can't find it with the name "amlogic-master" in your repository.

illusi0n · @balbes150 LE images with Kodi-19 for S9xxx illusi0n May 3, 2020 at 12:59 PM

Hello. I have S96Max with a broken emmc (not formatted and not defined). I wanted to use LibreELEC to start the system with an SD Card. Recorded an image. Specified the DTB file. The launch fails. Is there anything else you need to do? When you start the UART displays the following information:

Display Spoiler

G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:F;RCY:0;EMMC:0;READ:800;READ:800;READ:800;SD?:0;SD:0;READ:0;0.0;

bl2_stage_init 0x01

bl2_stage_init 0x81

hw id: 0x0001 - pwm id 0x00

bl2_stage_init 0xc0

bl2_stage_init 0x02

no sdio debug board detected

L0:00000000

L1:00000703

L2:00008067

L3:04000000

B2:00002000

B1:e0f83180

TE: 149436

BL2 Built : 10:47:19, Jan 14 2019. g12b g152d217 - guotai.shen@droid11-sz

Board ID = 1

Set A53 clk to 24M

Set A73 clk to 24M

Set clk81 to 24M

SYS1 pll lock check retry

try t0...

SYS1 pll lock check retry

try t1...

SYS1 pll lock check retry

Stop here...