Posts by rellla

Hi chewitt , short answer: Works.

Can do later. Is https://github.com/chewitt/LibreE…fc05a23839d53c5 the one which should solve it?

I already took that one for a self built LE13 and can confirm that it works.

Quote from chewitt

Urgh.. I didn't see that the first time (need new eyeballs).

Me too

Afaics label_boot() in pxe_utils.c composes a new fdtfile from ftdir and ftdfile, so if fdtdir is "amlogic" and fdtfile has the "amlogic" prepend, we get a doubled amlogic in the end.

Not tested, but I think the issue is definitely dtb-path-related, see my log above:

Quote

Retrieving file: /amlogic/amlogic/meson-g12b-odroid-n2-plus.dtb
Skipping fdtdir /amlogic/ for failure retrieving dts

I'm confused atm and did not dig into that too much, but i found this one https://github.com/u-boot/u-boot/…4064724c35c9a36 which seems to adress this problem?

There it is:

https://github.com/LibreELEC/Libr…53ae73750d240c5 is my showstopper!

Confirmed. If i readd that patch to a LE13, the odroid boots the kernel again.

chewitt https://github.com/LibreELEC/Libr…0bfec22f5cce5ce is the first bad commit

It wasn't the slash. I will go bisecting the commits ...

So, i did a manual bisect with the nightly builds and this is the result:

LibreELEC-AMLGX.aarch64-12.0-nightly-20231210-e521363-odroid-n2.img.gz (sha256) ok
LibreELEC-AMLGX.aarch64-12.0-nightly-20240228-c542431-odroid-n2.img.gz (sha256) ok
LibreELEC-AMLGX.aarch64-12.0-nightly-20240321-1972ad8-odroid-n2.img.gz (sha256) ok
LibreELEC-AMLGX.aarch64-12.0-nightly-20240322-5d8c60d-odroid-n2.img.gz (sha256) ok
LibreELEC-AMLGX.aarch64-12.0-nightly-20240323-353213e-odroid-n2.img.gz (sha256) ok
LibreELEC-AMLGX.aarch64-12.0-nightly-20240326-968e285-odroid-n2.img.gz (sha256) not ok
LibreELEC-AMLGX.aarch64-12.0-nightly-20240403-90a58fa-odroid-n2.img.gz (sha256) not ok
LibreELEC-AMLGX.aarch64-12.0-nightly-20240416-8b61557-odroid-n2.img.gz (sha256) not ok
LibreELEC-AMLGX.aarch64-12.0-nightly-20240617-6b04385-odroid-n2.img.gz (sha256) not ok

The issue was introduced somewhere between 353213e and 968e285. I didn't have a look into the commit history but will do so.

I'm still wondering, why it seems to be me the only one having this issue...

Ok, https://releases.libreelec.tv/LibreELEC-AMLG…droid-n2.img.gz is booting

https://releases.libreelec.tv/LibreELEC-AMLGX.aarch64-12.0.0-odroid-n2.img.gz

and https://chewitt.libreelec.tv/testing/LibreE…droid-n2.img.gz aren't booting with the above error.

Could this be an aarch64 thing?

https://test.libreelec.tv/13.0/Amlogic/o…droid-n2.img.gz also doen't

Maybe i should build an LE13 arm image?

-> yeah, wtf https://test.libreelec.tv/12.0/Amlogic/o…droid-n2.img.gz is working.

Why does my odroid don't like 64bit?

Thanks for moving the post.

I do not own an eMMC module, so i need to try SD. For a long time i used an arm-ARCH image which worked and yesterday i tried to boot the aarch64 one. I will try the linked image and give feedback. I have seen, there was some activity on drm/meson in the kernel, maybe it's one of those....

Hi,

i also have boot problems from SD, but with Odroid N2+:

Quote

G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:F;RCY:0;EMMC:800;NAND:81;SD?:0;SD:0;READ:0;0.
bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0000 - pwm id 0x01
bl2_stage_init 0xc1
bl2_stage_init 0x02

no sdio debug board detected
L0:00000000
L1:00000703
L2:0000c067
L3:14000020
B2:00402000
B1:e0f83180

TE: 353614

BL2 Built : 06:17:13, Jun 28 2019. g12b gf0505d7-dirty - qi.duan@droid13

Board ID = 5
Set A53 clk to 24M
Set A73 clk to 24M
Set clk81 to 24M
A53 clk: 1200 MHz
A73 clk: 1200 MHz
CLK81: 166.6M
smccc: 0005ad81
DDR driver_vesion: LPDDR4_PHY_V_0_1_14 build time: Jun 28 2019 06:17:09
board id: 5
Load FIP HDR from SD, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
fw parse done
Load ddrfw from SD, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0
Load ddrfw from SD, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0
PIEI prepare done
fastboot data load
fastboot data verify
verify result: 255
Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
DDR4 probe
ddr clk to 1320MHz
Load ddrfw from SD, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : End of initialization
INFO : End of read enable trainin*
INFO : End of fine write leveling
INFO : End of read dq deskew trainin*
INFO : End of MPR read delay center optimization
INFO : End of Write leveling coarse delay
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency trainin*
INFO : Trainin* has run successfully!
1D trainin* succeed
Load ddrfw from SD, src: 0x00020200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Trainin* has run successfully!

R0_RxClkDly_Margin==82 ps 7
R0_TxDqDly_Margi==118 ps 10

R1_RxClkDly_Margin==0 ps 0
R1_TxDqDly_Margi==0 ps 0

dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0001
2D trainin* succeed
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 2048MB
DMC_DDR_CTRL: 00600024DDR size: 3928MB
cs0 DataBus test pass
cs1 DataBus test pass
cs0 AddrBus test pass
cs1 AddrBus test pass
pre test bdlr_100_average==407 bdlr_100_min==407 bdlr_100_max==407 bdlr_100_cur==407
aft test bdlr_100_average==407 bdlr_100_min==407 bdlr_100_max==407 bdlr_100_cur==407
non-sec scramble use zero key
ddr scramble enabled

100bdlr_step_size ps== 407
result report
boot times 0Enable ddr reg access
Load FIP HDR from SD, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0
Load BL3X from SD, src: 0x0006c200, des: 0x0175c000, size: 0x000f3800, part: 0
0.0;M3 CHK:0;cm4_sp_mode 0
E30HDR
MVN_1=0x00000000
MVN_2=0x00000000
[Image: g12b_v1.1.3375-8f9c8a7 2019-01-24 10:44:46 guotai.shen@droid11-sz]
OPS=0x40
ring efuse init
chipver efuse init
29 0c 40 00 01 1d 0a 00 00 0c 31 32 32 50 30 50
[0.019859 Inits done]
secure task start!
high task start!
low task start!
run into bl31
NOTICE: BL31: v1.3(release):ab8811b
NOTICE: BL31: Built : 15:03:31, Feb 12 2019
NOTICE: BL31: G12A normal boot!
ERROR: Error initializing runtime service opteed_fast

<debug_uart>

U-Boot 2024.04 (Jun 12 2024 - 11:18:03 +0200) odroid-n2/n2-plus

Model: Hardkernel ODROID-N2
SoC: Amlogic Meson G12B (S922X) Revision 29:c (40:2)
DRAM: 1 GiB (effective 3.8 GiB)
Core: 400 devices, 30 uclasses, devicetree: separate
MMC: sd@ffe05000: 0, mmc@ffe07000: 1
Loading Environment from nowhere... OK
In: usbkbd,serial
Out: serial
Err: serial
Board variant: n2-plus
Net: eth0: ethernet@ff3f0000
Hit any key to stop autoboot: 0
switch to partitions #0, OK
mmc0 is current device
Scanning mmc 0:1...
Found /extlinux/extlinux.conf
Retrieving file: /extlinux/extlinux.conf
1: LibreELEC
Retrieving file: /KERNEL
append: boot=LABEL=LIBREELEC disk=LABEL=STORAGE quiet systemd.debug_shell=ttyAML0 console=ttyAML0,115200n8 console=tty0
Retrieving file: /amlogic/amlogic/meson-g12b-odroid-n2-plus.dtb
Skipping fdtdir /amlogic/ for failure retrieving dts
## Booting kernel from Legacy Image at 08080000 ...
Image Name:
Image Type: AArch64 Linux Kernel Image (lzo compressed)
Data Size: 12864965 Bytes = 12.3 MiB
Load Address: 01d80000
Entry Point: 01d80000
Verifying Checksum ... OK
## Flattened Device Tree blob at f0f3ca50
Booting using the fdt blob at 0xf0f3ca50
Working FDT set to f0f3ca50
Uncompressing Kernel Image to 1d80000
Moving Image from 0x1d80000 to 0x1e00000, end=3e50000
Loading Device Tree to 000000003ffe9000, end 000000003ffff34f ... OK
Working FDT set to 3ffe9000

Starting kernel ...

[ 0.327681] debugfs: Directory 'ff800280.cec' with parent 'regmap' already present!
[ 0.505853] Unable to handle kernel NULL pointer dereference at virtual address 00000000000000c8
[ 0.509060] Mem abort info:
[ 0.511763] ESR = 0x0000000096000004
[ 0.515547] EC = 0x25: DABT (current EL), IL = 32 bits
[ 0.520753] SET = 0, FnV = 0
[ 0.523752] EA = 0, S1PTW = 0
[ 0.526888] FSC = 0x04: level 0 translation fault
[ 0.531703] Data abort info:
[ 0.534541] ISV = 0, ISS = 0x00000004, ISS2 = 0x00000000
[ 0.539998] CM = 0, WnR = 0, TnD = 0, TagAccess = 0
[ 0.545051] GCS = 0, Overlay = 0, DirtyBit = 0, Xs = 0
[ 0.550257] [00000000000000c8] user address but active_mm is swapper
[ 0.556551] Internal error: Oops: 0000000096000004 [#1] PREEMPT SMP
[ 0.562736] Modules linked in:
[ 0.565755] CPU: 3 PID: 47 Comm: kworker/u24:1 Tainted: G W 6.9.3 #1
[ 0.573430] Hardware name: Hardkernel ODROID-N2 (DT)
[ 0.578347] Workqueue: events_unbound deferred_probe_work_func
[ 0.584126] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[ 0.591025] pc : meson_dw_hdmi_unbind+0x10/0x30
[ 0.595510] lr : component_unbind+0x38/0x60
[ 0.599650] sp : ffff8000822139d0
[ 0.602928] x29: ffff8000822139d0 x28: ffff0000008adf00 x27: ffff000004b42140
[ 0.610000] x26: 0000000000000001 x25: ffff800080d295d0 x24: ffff000000f0f000
[ 0.617073] x23: 0000000000000001 x22: ffff00000034b810 x21: ffff000000f0f000
[ 0.624145] x20: ffff0000008adf40 x19: ffff000004b42140 x18: 0000000000000002
[ 0.631218] x17: 0000000000000068 x16: 0000000000000000 x15: ffff0000004020b8
[ 0.638290] x14: 0000000000000000 x13: ffff800081a98258 x12: ffff000000401ff0
[ 0.645363] x11: 0000000000000000 x10: ffffffffffffffff x9 : 0000000000000001
[ 0.652435] x8 : ffff0000e47a0050 x7 : 0000000000000250 x6 : ffff8000802425b4
[ 0.659508] x5 : ffff800081bc7710 x4 : 0000000000000000 x3 : ffff8000806eeb10
[ 0.666580] x2 : ffff000000f0f000 x1 : ffff00000034b810 x0 : 0000000000000000
[ 0.673653] Call trace:
[ 0.676068] meson_dw_hdmi_unbind+0x10/0x30
[ 0.680208] component_unbind+0x38/0x60
[ 0.684003] component_unbind_all+0xb8/0xc4
[ 0.688143] meson_drv_bind_master+0x200/0x578
[ 0.692542] meson_drv_bind+0x14/0x20
[ 0.696164] try_to_bring_up_aggregate_device+0x218/0x2dc
[ 0.701512] __component_add+0xa8/0x194
[ 0.705307] component_add+0x14/0x20
[ 0.708843] meson_dw_hdmi_probe+0x1c/0x28
[ 0.712897] platform_probe+0x68/0xd8
[ 0.716519] really_probe+0xc0/0x39c
[ 0.720055] __driver_probe_device+0x7c/0x14c
[ 0.724368] driver_probe_device+0x3c/0x120
[ 0.728508] __device_attach_driver+0xbc/0x158
[ 0.732907] bus_for_each_drv+0x84/0xe4
[ 0.736702] __device_attach+0xa0/0x1c0
[ 0.740497] device_initial_probe+0x14/0x20
[ 0.744637] bus_probe_device+0xb0/0xbc
[ 0.748432] deferred_probe_work_func+0xa0/0x100
[ 0.753003] process_one_work+0x1e4/0x43c
[ 0.756970] worker_thread+0x1ac/0x380
[ 0.760679] kthread+0xfc/0x108
[ 0.763784] ret_from_fork+0x10/0x20
[ 0.767322] Code: d503233f a9bf7bfd 910003fd f9403c00 (f9406400)
[ 0.773360] ---[ end trace 0000000000000000 ]---

Display More

This is with a manual built with LE13/VDRSternELEC. But the problem is the same with a downloadable LE12 from the SD Creator.

I will test with an older LE image and a most recent again. Not sure, what went wrong here.

Hi all,

i guess this is the right thread to ask my questions. I'll tell sth about the basics first:

With https://github.com/Zabrimus/VDRSternELEC we have a "fork" of LE/CE which applies additional packages and patches to LE to have a VDR (http://www.tvdr.de) as a fully useable "standalone" client of VDR next to kodi instead of just the VDR backend, like it's implemented in LE already. This works really fine already but i have some problems with the VDRs output-plugin still. The codebase (kernel, ffmpeg) is the same like in kodi.

The output plugin uses one DRM plane to render the OSD/GUI on (software or GLES), the video is hardware decoded with ffmpeg and is rendered to another DRM plane directly through prime. This works fine for Rockchip and Allwinner.

Atm I try to implement support for Rpi4 and Rpi5. The path is ok for hardware-decoded h264 on the RPi4.

mpeg2 on RPi4 and h264/ mpeg2 on Rpi5 is software decoded with ffmpeg and there I have some "blocky" display output and i still haven't found out, where the issue is.

My question is: What is the kodi-rendering way for software decoded video on Rpi4 and Rpi5? Is kodi using some memcpy to render to a buffer for DRM or does it render the video with GLES? If so, does kodi use separate primary and overlay planes for GUI and video or does it render both (GUI and video) onto one plane?

If GLES for video should be the path, which might be of succes, I'll try to implement it. But if kodi is getting the software-decoded video to DRM via some other path, I'll go on searching for the problem on my side.

Would be good, if you can give me some hints for the right path.

Btw., the blocky videos render in kodi just fine.

Thanks for your help

rellla

chewitt Hi, i'm answering here instead of irc. Was away some days...

Yes, thats me. My test device is a wetek play2.

We had an issue in our drm code. This didn't handle multiplanar planes, but thats fixed now with https://github.com/rellla/vdr-plu…810911f8c6e36e8

One issue is still remaining. I have a 576i TV stream, which results in a video, where lines are shifted horizontally. I'm not sure, if this is a deinterlacing (which should be disabled) or decoding or drm problem. Will the deinterlacer work at all atm?

I didn't dig into that one too deep, that was just a quick test. I will try to figure out some more the next days, but if you have any hints what we are are missing, i'm glad, too

Thanks for the hints. I will try to get more logs and will also try older uboot versions. Let's see ...

Hi jernej ,

coming back to my Tanix TX6 boot problem, i have serial access now and this is the log:

The first two boots are fine, then the device stops 3 times at DRAM: 

The only possible way to proceed is to disconnect power.

Next boot (line 96) i accidentally interrupted by a power disconnect, but in the end it boots again.

Looking at the different DRAM values all over the log, it smells like some DRAM detection issue...

Would be cool, if you have some idea. Ping me, if i should open a new thread or if you need some more infos.

Thanks

rellla

EDIT:

Some more logs, after a next reboot try:

[  659.836987] systemd-shutdown[1]: Failed to set timeout to 10min: Invalid argument
[  659.916555] [1315]: Failed to unmount /flash: Device or resource busy
[  659.934291] systemd-shutdown[1]: Failed to finalize file systems, loop devices, ignoring.
[  659.982746] reboot: Restarting system

U-Boot SPL 2022.10 (Nov 13 2022 - 11:56:04 +0100)
DRAM:This DRAM setup is currently not supported.

resetting ...

U-Boot SPL 2022.10 (Nov 13 2022 - 11:56:04 +0100)
DRAM:This DRAM setup is currently not supported.

resetting ...

U-Boot SPL 2022.10 (Nov 13 2022 - 11:56:04 +0100)
DRAM:This DRAM setup is currently not supported.

resetting ...

U-Boot SPL 2022.10 (Nov 13 2022 - 11:56:04 +0100)
DRAM:

Hi,

sorry for pushing this thread up again. I also have this issue and can workaround it with a manual scripts/clean and scripts/build.

It comes up here, once i do a debug build in a build dir which had been the directory for a non-debug build before and vice-versa (without doing a clean build).

It's not that big problem for me, but probably there is still some issue somewhere and my description can help finding it.

Regards

rellla

EDIT: For the record, autogen.sh seems to be where it should be ...

Ok thanks. It could take a while, but i will see if i can do some soldering...

Ok jernej , so here is my feedback:

Booting works now with the nightly image (and my self-built one

I've got still problems with reboot. This seems to be board-version specific.

I own two different TX6:

According to https://linux-sunxi.org/Tanix_TX6#Identification it's the TX6-H 2nd version (with CS_H6_TX28_V2.7 20200616.L6 / RTL8822CS) - though it's just stickered with TX6 on the backside - which is the one, that doesn't reboot. I need to disconnect it from power and after a few attempts of reconnecting it suddenly boots again. It's not reproduceable how many reconnect tries are necessary...

The second one is a TX6-P (CS_H6_TX28_V2.5 20191209.L4 / XR819) with the TX6-P label on it. This one reboots just fine.

So, better than before, but still some reboot issue on the TX6-H (2nd version). Though this is surely no LE issue, but an upstream or hardware-specific one maybe this info could be helpful for you.